KSZ8862-16M Datasheet | Microchip Technology

Features Switch Management - Non-Blocking Switch Fabric Assures Fast Packet Delivery by Utilizing a 1K Entry Forwarding Table and a Store-and-Forward Architecture - Fully pliant with IEEE 802.3u Standards - Full-Duplex IEEE 802.3x Flow Control (Pause) with Force Mode Option - Half-Duplex Back Pressure Flow Control Advanced Switch Management - IEEE 802.1Q VLAN Support for Up to 16 Groups (Full Range of VLAN IDs) - VLAN ID Tag/Untag Options, on a Per Port Basis - IEEE 802.1p/Q Tag Insertion or Removal on a Per Port Basis (Egress) - Programmable Rate Limiting at the Ingress and Egress Ports - Broadcast Storm Protection - IEEE 802.1d Spanning Tree Protocol Support - MAC Filtering Function to Filter or Forward Unknown Unicast Packets - Direct Forwarding Mode Enabling the Processor to Identify the Ingress Port and to Specify the Egress Port - Internet Group Management Protocol (IGMP) v1/ v2 Snooping Support for Multicast Packet Filtering - IPV6 Multicast Listener Discovery (MLD) Snooping Support Fiber Support - Integrated LED Driver and Post Amplifier for 10BASE-FL and 100BASE-SX Optical Modules - 100BASE-FX/SX and 10BASE-FL Fiber Support on Port 1 Monitoring - Port Mirroring/Monitoring/Sniffing: Ingress and/or Egress Traffic to Any Port - MIB Counters for Fully pliant Statistics Gathering - 34 MIB Counters Per Port - Loopback Modes for Remote Failure Diagnostics prehensive Register Access - Control Registers Configurable On-the-Fly (Port Priority, 802.1p/d/Q) Qo S/Co S Packets Prioritization Support - Per Port, 802.1p and Diff Serv-Based - Remapping of 802.1p Priority Field on a Per Port Basis Power Modes, Packaging, and Power Supplies - Full-Chip Hardware Power-Down (Register Configuration not Saved) Allows Low Power Dissipation - Per Port-Based, Software Power-Save on PHY (Idle Link Detection, Register Configuration Preserved) - Single Power Supply: 3.3V - mercial Temperature Range: 0°C to +70°C - Available in 128-Pin PQFP - Available in -16 Version for 8/16-Bit Bus...