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MIC5167
1MHz, 6A, Integrated Switch, High-Efficiency, Synchronous Buck DDR Memory Terminator
General Description
The MIC5167 is a high-efficiency, 6A, integrated switch, synchronous regulator designed for use as a double data rate (DDR) or quad data rate (QDR) terminator. The MIC5167 is optimized for highest efficiency, achieving more than 94% efficiency while still switching at 1MHz over a broad range. The device works with a small 0.4µH inductor and 300µF output capacitor. The MIC5167 offers a simple, low-cost, JEDEC-compliant solution for terminating high-speed, low-voltage, digital buses (i.e. DDR, DDR2, DDR3, DDR3L, DDR3UL, DDR4, SCSI, GTL, SSTL, HSTL, LV-TTL, LV-PECL, and LV_ECL) with a Power-Good (PG) output. The output voltage is controlled externally by input to the VDDQ pin.