SY100EL91L Datasheet | Micrel Semiconductor

Micrel, Inc. 3.3V TRIPLE LVPECL-to-ECL OR LVPECL-to-LVECL TRANSLATOR Features s 3.3V power supply s 620ps propagation delay s Fully differential design s Supports low voltage operation s Available in 20-pin SOIC package DESCRIPTION The SY100EL91L is a triple LVPECL-to-ECL or LVPECL-to-LVECL translator. A VBB output is provided for interfacing with single ended PECL signals at the input. If a single ended input is to be used, the VBB output should be connected to the D input. The active signal would then drive the D input. When used, the VBB output should be bypassed to ground via a 0.01µF capacitor. The VBB output is designed to act as the switching reference for the EL91L under single ended input switching conditions. As a result this pin can only source/sink up to 0.5m A of current. To acplish the level translation the EL91L requires three power rails. The VCC supply should be connected to the positive supply, and the VEE pin should be connected to the negative power supply. The GND pins as expected are connected to the system ground plane. Both VEE and VCC should be bypassed to ground via 0.01µF capacitors. Under open input conditions, the D input will be biased at VCC/2 and the D input will be pulled to GND. This condition will force the Q output to a LOW, ensuring stability. FUNCTION TABLE Function LVPECL-to-ECL LVPECL-to-LVECL Vcc 3.3V 3.3V - 5.0V - 3.3V PIN NAMES Pin Dn Qn PECL_VBB Function PECL Inputs ECL Outputs PECL Reference Voltage Output M9999-031306 hbwhelp@micrel. or (408) 955-1690 Rev.: H Amendment: /0 Issue Date: December 2005 Micrel, Inc. PACKAGE/ORDERING INFORMATION VCC 1 D0 2 D0 3 PECL_VBB 4 D1 5 D1 6 PECL_VBB 7 D2 8 D2 9 VEE 10 ECL PECL PECL PECL ECL...