SY100EP195V Datasheet | Micrel Semiconductor

Micrel, Inc. 3.3V/5V 2.5GHz PROGRAMMABLE DELAY ECL Pro® ESCYL100PEr Po1®95V Features - Pin-for-pin, plug-in patible to the ON Semiconductor MC100EP195 - Maximum frequency > 2.5GHz - Programmable range: 2.2ns to 12.2ns - 10ps increments - PECL mode operating range: VCC = 3.0V to 5.5V with VEE = 0V - NECL mode operating range: VCC = 0V with VEE = - 3.0V to - 5.5V - Open input default state - Safety clamp on inputs - A logic high on the /EN pin will force Q to logic low - D[0:10] can accept either ECL, CMOS, or TTL inputs - VBB output reference voltage - Available in a 32-pin TQFP package ECL Pro® DESCRIPTION The SY100EP195V is a programmable delay line, varying the time a logic signal takes to traverse from IN to Q. This delay can vary from about 2.2ns to about 12.2ns. The input can be PECL, LVPECL, NECL, or LVNECL. The delay varies in discrete steps based on a control word presented to SY100EP195V. The 10-bit width of this latched control register allows for delay increments of approximately 10ps. An eleventh control bit allows the cascading of multiple SY100EP195V devices, for a wider delay range. Each additional SY100EP195V effectively doubles the delay range available. For maximum flexibility, the control register interface accepts CMOS or TTL level signals, as well as the input level at the IN± pins. All support documentation can be found on Micrel’s web site at: .micrel.. APPLICATIONS - Clock de-skewing - Timing adjustment - Aperture...