SY10H842 Datasheet | Micrel Semiconductor

Micrel, Inc. NOT REMENDED FOR NEW DESIGNS SINGLE SUPPLY QUAD PECL-TO-TTL OUTPUT ENABLE Precision Edge® Precision SESYd Y110g00e HH®884422 SY10H842 SY100H842 Features s Translates positive ECL-to-TTL (PECL-to-TTL) s 300ps pin-to-pin skew s 500ps part-to-part skew s Differential internal design for increased noise immunity and stable threshold inputs s VBB reference output s Single supply s Enable input s Extra TTL and ECL power/ground pins to reduce cross-talk/noise s High drive capability: 24m A each output s Fully patible with industry standard 10K, 100K I/O levels s Available in 16-pin SOIC package Precision Edge® DESCRIPTION The SY10/100H842 are single supply, low skew translating 1:4 clock drivers. The devices feature a 24m A TTL output stage, with AC performance specified into a 50p F load capacitance. A HIGH on the enable pin (EN) forces all outputs LOW. As frequencies increase to 40MHz and above, precise timing and shaping of clock signals bees extremely important. The H842 solves several clock distribution problems such as minimizing skew 300ps), maximizing clock fanout (24m A drive), and precise duty cycle control through a proprietary differential internal design. The 10K version is patible with 10KH ECL logic levels. The 100K version is patible with 100K levels. BLOCK DIAGRAM TTL Outputs Q0 Q1 Q2 PIN NAMES Pin GT VT VE GE D, D VBB Q0 - Q3 EN Function TTL Ground (0V) TTL VCC (+5.0V) ECL VCC (+5.0V) ECL Ground (0V) Signal Input (PECL) VBB Reference Output (PECL) Signal Outputs (TTL) Enable Input (PECL) ECL Input D D VBB EN Q3 Precision Edge is a registered trademark of Micrel, Inc. M9999-032906 hbwhelp@micrel. or (408) 955-1690 Rev.: F Amendment: /0 Issue Date: March 2006 Micrel,...