SY54017R Datasheet | Micrel Semiconductor

.Data Sheet.co.kr Low Voltage 1.2V/1.8V CML 2:1 MUX with Fail Safe Inputs, 3.2Gbps, 2.5GHz General Description The SY54017R is a fully differential, low voltage 1.2V/1.8V CML 2:1 MUX with Fail Safe Inputs. The SY54017R can process clock signals as fast as 2.5GHz or data patterns up to 3.2Gbps. The differential input includes Micrel’s unique, 3-pin input termination architecture that interfaces to LVPECL, LVDS or CML differential signals, (AC- or DC-coupled from a 2.5V driver) as small as 100m V (200m VPP) without any level-shifting or termination resistor networks in the signal path. For AC-coupled input interface applications, an internal voltage reference is provided to bias the VT pin. The outputs are CML, with extremely fast rise/fall times guaranteed to be less than 95ps. The SY54017R operates from a 2.5V ±5% core supply and a 1.8V or 1.2V ±5% output supply and is guaranteed over the full industrial temperature range (- 40°C to +85°C). The SY54017R is part of Micrel’s high-speed, Precision Edge® product line. Datasheets and support documentation can be found on Micrel’s web site at: .micrel.. Precision Edge® Features - 1.2V/1.8V CML 2:1 MUX with Fail Safe Inputs - Guaranteed AC performance over temperature and voltage: - DC-to- > 3.2Gbps throughput - <390ps propagation delay (IN-to-Q) - <20ps Input-to-Input skew - <95ps rise/fall times - Ultra-low jitter design - <1ps RMS cycle-to-cycle jitter - <10ps PP total jitter - <1ps RMS random jitter - <10ps PP deterministic jitter - High-speed CML outputs - 2.5V ±5% , 1.8/1.2V ±5% power supply operation - Industrial temperature range: - 40°C to +85°C - Available in 16-pin (3mm x 3mm) MLF® package Functional Block Diagram Applications - - - - Data Distribution: OC-48, OC-48+FEC SONET clock and data distribution Fibre Channel clock and data distribution Gigabit Ethernet clock and data distribution Markets - - - - - -...