SY58608U Datasheet | Micrel Semiconductor

3.2Gbps Precision, 1:2 LVDS Fanout Buffer with Internal Termination and Fail Safe Input General Description The SY58608U is a 2.5V, high-speed, fully differential 1:2 LVDS fanout buffer optimized to provide two identical output copies with less than 20ps of skew and 130fs RMS typical additive phase jitter. The SY58608U can process clock signals as fast as 2GHz or data patterns up to 3.2Gbps. The differential input includes Micrel’s unique, 3-pin input termination architecture that interfaces to LVPECL, LVDS or CML differential signals, (AC- or DC-coupled) as small as 100m V (200m VPP) without any level-shifting or termination resistor networks in the signal path. For AC-coupled input interface applications, an integrated voltage reference (VREF-AC) is provided to bias the VT pin. The outputs are 325m V LVDS, with rise/fall times guaranteed to be less than 100ps. The SY58608U operates from a 2.5V ±5% supply and is guaranteed over the full industrial temperature range (- 40°C to +85°C). For applications that require CML or LVPECL outputs, consider Micrel’s SY58606U and SY58607U, 1:2 fanout buffers with 400m V and 800m V output swings respectively. The SY58608U is part of Micrel’s high-speed, Precision Edge® product line. Data sheets and support documentation can be found on Micrel’s web site at: .micrel.. Functional Block Diagram Features - Precision 1:2, 325m V LVDS fanout buffer - Guaranteed AC performance over temperature and voltage: - DC-to > 3.2Gbps throughput - <300ps propagation delay (IN-to-Q) - <20ps within-device skew - <100ps rise/fall times - Fail Safe Input - Prevents outputs from oscillating when input is invalid - Ultra-low jitter design - 130fs RMS typical additive phase jitter - High-speed LVDS outputs - 2.5V ±5% power supply operation - Industrial temperature range: - 40°C to +85°C - Available in 16-pin (3mm x 3mm) QFN package Applications - All SONET clock and data distribution - Fibre Channel clock and data distribution - Gigabit...