SY87700L Description
The SY87700L is a plete Clock Recovery and Data Retiming integrated circuit for data rates from 32Mbps up to 175Mbps NRZ. The device is ideally suited for SONET/SDH/ATM applications and other high-speed data transmission systems. Clock recovery and data retiming is performed by synchronizing the on-chip VCO directly to the ining data stream.
SY87700L Key Features
- Industrial temperature range (-40°C to +85°C)
- 3.3V power supply
- SONET/SDH/ATM patible
- Two on-chip PLLs: one for clock generation and another for clock recovery
- Selectable reference frequencies
- Differential PECL high-speed serial I/O
- Line receiver input: no external buffering needed
- Link Fault indication
- 100k ECL patible I/O
SY87700L Applications
- Available in 32-pin EPAD-TQFP and 28-pin SOIC packages (28-pin SOIC is available, but is not remended for new designs.)