SY89200U
Overview
The SY89200U is a 2.5V precision, high-speed, integrated clock divider and LVDS fanout buffer capable of handling clocks up to 1.5GHz. Optimized for communications applications, the three independently controlled output banks are phase matched and can be configured for pass through (÷1), ÷2 or ÷4 divider ratios.
- Three low-skew LVDS output banks with programmable ÷1, ÷2 and ÷4 divider options
- Three independently programmable output banks
- Guaranteed AC performance over temperature and voltage: - Accepts a clock frequency up to 1.5GHz - <900ps IN-to-OUT propagation delay - <150ps rise/fall time - <50ps bank-to-bank phase offset
- Ultra-low jitter design: - <1psRMS random jitter - <10psPP total jitter (clock)
- Patent-pending input termination and VT pin accepts DC- and AC-coupled inputs (CML, PECL, LVDS)
- LVDS-compatible outputs
- CMOS/TTL-compatible output enable (EN) and divider select control
- 2.5V ±5% power supply
- -40°C to +85°C temperature range
- Available in 32-pin (5mm × 5mm) QFN package
