SY89202U
Overview
The SY89202U is a precision, high-speed, integrated clock divider LVPECL fanout buffer capable of handling clocks up to 1.5GHz. Optimized for communications applications, the three independently controlled output banks are phase matched and can be configured for pass-through (÷1), ÷2 or ÷4 divide ratios.
- Three independently programmable output banks
- Guaranteed AC performance over temp and voltage: - >1.5GHz clock frequency (fMAX) - <930ps In-to-Out tpd - <220ps tr/tf
- Ultra-low jitter design: - <1psRMS random jitter (RJ) - <10psPP total jitter (clock)
- Internal input termination
- Patent-pending input termination and VT pin accepts AC- and DC-coupled inputs (CML, PECL, LVDS)
- 800mV LVPECL output swing
- CMOS/TTL-compatible output enable (EN) and divider select control
- Power supply 2.5V +5% or 3.3V +10%
- -40oC to +85oC industrial temperature range
- Available in 32-pin QF
