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PL685-28 - 19MHz to 250MHz Low Phase-Noise XO

Description

The PL685-28 is a Dual LC core monolithic IC clock, capable of maintaining sub-1ps RMS phase jitter, while covering a wide frequency output range up to 250MHz, without the use of external components.

Features

  • horized for use as critical components in life support devices or systems wi thout the express written approval of the President of Micrel Inc. Micrel Inc.
  • 2180 F.

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Datasheet preview – PL685-28

Datasheet Details

Part number PL685-28
Manufacturer Micrel
File Size 326.49 KB
Description 19MHz to 250MHz Low Phase-Noise XO
Datasheet download datasheet PL685-28 Datasheet
Additional preview pages of the PL685-28 datasheet.

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Full PDF Text Transcription

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(Preliminary) PL685-28 FE AT UR E S 19MHz to 250MHz Low Phase-Noise XO PAD CONFIGURATION  < 0.6ps RMS phase jitter (12kHz to 20MHz) at 155.52MHz  30ps max peak to peak period jitter  8bit Switch Capacitor for ±50PPM crystal CLoad tuning о Load Capacitance Tuning Range: 8pF to 12pF  Ultra Low-Power Consumption о < 90 mA @155MHz PECL output о <10A at Power Down (PDB) Mode  Input Frequency: о Fundamental Crystal: 19MHz to 40MHz  Output Frequency: о 19MHz to 250MHz output.  Output types: LVPECL.  Programmable OE input polarity selection.  Power Supply: 3.
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