ML65245 Datasheet | Micro Linear

DESCRIPTION The ML65245 and ML65L245 are non-inverting octal transceivers. The high operating frequency (50MHz driving a 50p F load) and low propagation delay (ML65245 - 1.7ns, ML65L245 - 2ns) make them ideal for very high speed applications such as processor bus buffering and cache and main memory control. These transceivers use a unique analog implementation to eliminate the delays inherent in traditional digital designs. Schottky clamps reduce under and overshoot, and special output driver circuits limit ground bounce. The ML65245 and ML65L245 conform to the pinout and functionality of the industry standard FCT245 and are intended for applications where propagation delay is critical to the system design. Note: This part was previously numbered ML6580. FEATURES s Low propagation delay - 1.7ns ML65245 2.0ns ML65L245 s Fast 8-bit TTL level transceiver with three-state capability on the output s TTL patible input and output levels s Schottky diode clamps on all inputs to handle undershoot and overshoot s Onboard schottky diodes minimize noise s Reduced output swing of 0 - 4.1 volts s Ground bounce controlled outputs, typically less than 400m V s Industry standard FCT245 type pinout s Applications include high speed cache memory, main memory, processor bus buffering, and graphics cards - - This Product Is End Of Life As Of August 1, 2000 - This Product Is Obsolete BLOCK DIAGRAM VCC 20 VCC T/R 1 OE 19 A0 2 A1 3 A2 4 A3 5 A4 6 A5 7 A6 8 A7 9 10 GND 18 B0 17 B1 16 B2 15 B3 14 B4 13 B5 12 B6 11 B7 ML65245- - /ML65L245- PIN CONFIGURATION 20-Pin SOIC, QSOP T/R A0 A1 A2 A3 A4 A5 A6 A7 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC OE B0 B1 B2 B3 B4 B5 B6 B7 TOP VIEW PIN DESCRIPTION NAME Ai Bi T/R OE GND VCC I/O I/O I/O I I I I DESCRIPTION Data Bus A Data Bus B Direction select Output Enable Signal Ground + 5V...