PIC18C601 Overview
PIC18C601/801 High-Performance ROM-less Microcontrollers with External Memory Bus High Performance RISC CPU: C piler optimized architecture instruction set Linear program memory addressing up to 2 Mbytes Linear data memory addressing to 4 Kbytes External Program Memory On-Chip Device Maximum Addressing (bytes) 256K 2M Maximum Single Word Instructions 128K 1M On-Chip RAM (bytes) Advanced Analog.
PIC18C601 Key Features
- Fast sampling rate
- Conversion available during SLEEP
- DNL = ±1 LSb, INL = ±1 LSb
- Up to 12 channels available
- Programmable Low Voltage Detection (LVD) module
- Supports interrupt on Low Voltage Detection
- Power-on Reset (POR), Power-up Timer (PWRT), and Oscillator Start-up Timer (OST)
- Watchdog Timer (WDT) with its own on-chip RC oscillator
- On-chip Boot RAM for boot loader application
- 8-bit or 16-bit external memory interface modes