Description
for Additional Details)
Single 25 MHz Reference Clock for Both PHY and
MAC
supporting PHYs physical media.
Low Power CMOS Design
Supports Multiple Embedded Processor Host
Interfaces - ARM - SH - Power PC - Coldfire
Features
- Optional Configuration via Serial EEPROM Inter-
face.
- Supports 8, 16 and 32 Bit CPU Accesses.
- Internal 32 Bit Wide Data Path (Into Packet Buffer
Memory).
- Built-in Transparent Arbitration for Slave Sequen-
tial Access Architecture.
- Flat MMU Architecture with Symmetric Transmit
and Receive Structures and Queues.
- 3.3V Operation with 5V Tolerant IO Buffers (See
Pin List.
LAN91C111 Datasheet
