LAN91C111 - 10/100 Non-PCI Ethernet Single Chip MAC + PHY

Product Overview

Microchip

Datasheet Details

Part number	LAN91C111
Manufacturer	Microchip
File Size	736.70 KB
Description	10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet	LAN91C111 Datasheet
Additional preview pages of the LAN91C111 datasheet.

Product details

Description

for Additional Details) Single 25 MHz Reference Clock for Both PHY and MAC External 25Mhz-output pin for an external PHY supporting PHYs physical media. Low Power CMOS Design Supports Multiple Embedded Processor Host Interfaces - ARM - SH - Power PC - Coldfire

Features

Optional Configuration via Serial EEPROM Inter- face.
Supports 8, 16 and 32 Bit CPU Accesses.
Internal 32 Bit Wide Data Path (Into Packet Buffer Memory).
Built-in Transparent Arbitration for Slave Sequen- tial Access Architecture.
Flat MMU Architecture with Symmetric Transmit and Receive Structures and Queues.
3.3V Operation with 5V Tolerant IO Buffers (See Pin List.

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Published: Jan 30, 2017 |