LAN91C111 Overview
for Additional Details) Single 25 MHz Reference Clock for Both PHY and MAC External 25Mhz-output pin for an external PHY supporting PHYs physical media. Low Power CMOS Design Supports Multiple Embedded Processor Host Interfaces ARM SH Power PC Coldfire 680X0, 683XX MIPS R3000 3.3V MII (Media Independent Interface) MAC-PHY Interface Running at Nibble Rate MII Management Serial Interface 128 Pin QFP package; green,...
LAN91C111 Key Features
- Single Chip Ethernet Controller Dual Speed
- ARM SH Power PC Coldfire 680X0, 683XX MIPS R3000
- Fully Integrated IEEE 802.3/802.3u-100Base-TX/ 10Base-T Physical Layer
- Auto Negotiation: 10/100, Full / Half Duplex
- On Chip Wave Shaping
- No External Filters Required
- Adaptive Equalizer
- Baseline Wander Correction
- LED Outputs (User selectable
- Up to 2 LED functions at one time)
