TP2104 Overview
The TP2104 low-threshold, Enhancement-mode (normally-off) transistor uses a vertical DMOS structure and a well-proven silicon-gate manufacturing process. This bination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and...
TP2104 Key Features
- High Input Impedance and High Gain
- Low-Power Drive Requirement
- Ease of Paralleling
- Low CISS and Fast Switching Speeds
- Excellent Thermal Stability
- Integral Source-Drain Diode
- Free from Secondary Breakdown
TP2104 Applications
- Logic-Level Interfaces (Ideal for TTL and CMOS)
