Datasheet Summary
P-Channel Enhancement-Mode Vertical DMOS FET
Features
- High Input Impedance and High Gain
- Low-Power Drive Requirement
- Ease of Paralleling
- Low CISS and Fast Switching Speeds
- Excellent Thermal Stability
- Integral Source-Drain Diode
- Free from Secondary Breakdown
Applications
- Logic-Level Interfaces (Ideal for TTL and CMOS)
- Solid-State Relays
- Analog Switches
- Power Management
- Telemunication Switches
General Description
The TP2104 low-threshold, Enhancement-mode (normally-off) transistor uses a vertical DMOS structure and a well-proven silicon-gate manufacturing process. This bination produces a device with the power handling capabilities of bipolar...
