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TP2535 Datasheet PDF

Microchip Technology TP2535

The TP2535 low-threshold, Enhancement-mode (normally-off) transistor uses a vertical DMOS structure and a well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices.
Part No. TP2535
Datasheet TP2535 Download
Manufacturer
Microchip Technology
Description P-Channel Vertical DMOS FETs
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TP2535 datasheet page 1 preview

FEATURES

● –2.4V Maximum Low Threshold
● High Input Impedance
● 60 pF Low Input Capacitance
● Fast Switching Speeds
● Low On-Resistance
● Free from Secondary Breakdown
● Low Input and Output Leakage

APPLICATIONS

● Logic-Level Interfaces (Ideal for TTL and CMOS)
● Solid-State Relays
● Battery-Operated Systems
● Photovoltaic Drives
● Analog Switches
● General Purpose Line Drivers
● Telecommunication Switches

GENERAL DESCRIPTION

Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. Microchip’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Package Type 3-lead TO-92 (Top view) See Table 3-1 for pin information. SOURCE DRAIN GATE  2020 Microchip Technology Inc. DS20005971A-page 1 TP2535 1.0

ELECTRICAL CHARACTERISTICS

ABSOLUTE MAXIMUM RATINGS

† Drain-to-Source Voltage .......................................................................................................................
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