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dsPIC33FJ128GP206A - 16-bit Digital Signal Controllers

Download the dsPIC33FJ128GP206A datasheet PDF. This datasheet also covers the dsPIC33FJ64GP706A variant, as both devices belong to the same 16-bit digital signal controllers family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Two ADC modules: - Configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H - 18 analog inputs on 64-pin devices and up to 32 analog inputs on 100-pin devices.
  • Flexible and independent ADC trigger sources Qualification and Class B Support.
  • AEC-Q100 REVG (Grade 1 -40ºC to +125ºC).
  • AEC-Q100 REVG (Grade 0 -40ºC to +150ºC).
  • Class B Safety Library, IEC 60730 Debugger Development Support.
  • In-c.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (dsPIC33FJ64GP706A_Microchip.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
dsPIC33FJXXXGPX06A/X08A/X10A 16-bit Digital Signal Controllers (up to 256 KB Flash and 30 KB SRAM) with Advanced Analog Operating Conditions • 3.0V to 3.6V, -40ºC to +150ºC, DC to 20 MIPS • 3.0V to 3.6V, -40ºC to +125ºC, DC to 40 MIPS Timers/Output Compare/Input Capture • Up to nine 16-bit timers/counters. Can pair up to make four 32-bit timers. • Eight Output Compare modules configurable as timers/counters • Eight Input Capture modules Core: 16-bit dsPIC33F CPU • • • • Code-efficient (C and Assembly) architecture Two 40-bit wide accumulators Single-cycle (MAC/MPY) with dual data fetch Single-cycle mixed-sign MUL plus hardware divide Communication Interfaces • Two UART modules (10 Mbps) - With support for LIN 2.