MT28F400B3 Datasheet | Micron Technology

FEATURES - Seven erase blocks: 40-Pin 16KB/8K-word boot block (protected) Two 8KB/4K-word parameter blocks Four main memory blocks - Smart 3 technology (B3): 3.3V ±0.3V VCC 3.3V ±0.3V VPP application programming 5V ±10% VPP application/production programming1 - patible with 0.3µm Smart 3 device - Advanced 0.18µm CMOS floating-gate process - Address access time: 80ns - 100,000 ERASE cycles - Industry-standard pinouts - Inputs and outputs are fully TTL-patible - Automated write and erase algorithm - Two-cycle WRITE/ERASE sequence - Byte- or word-wide READ and WRITE . (MT28F400B3, 256K x 16/512K x 8) - Byte-wide READ and WRITE only (MT28F004B3, 512K x 8) - TSOP and SOP packaging options TSOP Type I 48-Pin TSOP Type I 44-Pin SOP Data Shee OPTIONS - Timing 80ns access - Configurations 512K x 8 256K x 16/512K x 8 - Boot Block Starting Word Address Top (3FFFFh) Bottom (00000h) - Operating Temperature Range mercial (0ºC to +70ºC) Extended (-40ºC to +85ºC) - Packages 44-pin SOP (MT28F400B3) 48-pin TSOP Type I (MT28F400B3) 40-pin TSOP Type I (MT28F004B3) NOTE: MARKING -8 MT28F004B3 MT28F400B3 T B None ET SG WG VG GENERAL DESCRIPTION The MT28F004B3 (x8) and MT28F400B3 (x16/x8) are nonvolatile, electrically block-erasable (flash), programmable memory devices containing 4,194,304 bits organized as 262,144 words (16 bits) or 524,288 bytes (8 bits). Writing or erasing the device is done with either a 3.3V or 5V VPP voltage, while all operations are performed with a 3.3V VCC. Due to process technology advances, 5V VPP is optimal for application and production programming. These devices are fabricated with Micron’s advanced 0.18µm CMOS floating-gate process. The MT28F004B3 and MT28F400B3 are organized into seven separately erasable blocks. To ensure that critical firmware is protected from accidental erasure or overwrite, the devices feature a hardware-protected boot block. Writing or erasing the boot block requires either applying a super-voltage to the RP# pin or driving WP#...