MT28F400B5 Datasheet | Micron Technology

FEATURES - Seven erase blocks: 16KB/8K-word boot block (protected) Two 8KB/4K-word parameter blocks Four main memory blocks - Smart 5 technology (B5): 5V ±10% VCC 5V ±10% VPP application/production programming 12V ±5% VPP patibility production programming - Address access times: 60ns, 80ns - 100,000 ERASE cycles - Industry-standard pinouts - Inputs and outputs are fully TTL-patible - Automated write and erase algorithm - Two-cycle WRITE/ERASE sequence - Byte- or word-wide READ and WRITE (MT28F400B5, 256K x 16/512K x 8) - Byte-wide READ and WRITE only (MT28F004B5, 512K x 8) - TSOP and SOP packaging options 40-Pin TSOP Type I 48-Pin TSOP Type I 44-Pin SOP GENERAL DESCRIPTION The MT28F004B5 (x8) and MT28F400B5 (x16, x8) are nonvolatile, electrically block-erasable (flash), programmable, read-only memories containing 4,194,304 bits organized as 262,144 words (16 bits) or 524,288 bytes (8 bits). Writing or erasing the device is done with a 5V VPP voltage, while all operations are performed with a 5V VCC. Due to process technology advances, 5V VPP is optimal for application and production programming. For backward patibility with Smart Voltage technology, 12V VPP is supported for a maximum of 100 cycles and may be connected for up to 100 cumulative hours. These devices are fabricated with Micron’s advanced CMOS floating-gate process. The MT28F004B5 and MT28F400B5 are organized into seven separately erasable blocks. To ensure that critical firmware is protected from accidental erasure or overwrite, the devices feature a hardware-protected boot block. Writing or erasing the boot block requires either applying a super-voltage to the RP# pin or driving WP# HIGH in addition to executing the normal write or erase sequences. This block may be used to store code implemented in low-level system recovery. The remaining blocks vary in density and are written and erased with no additional security measures. Please refer to Micron’s Web site (.micron./ flash/htmls/datasheets.html)p...