MT48V8M16LFF4
Key Features
- Fully synchronous; all signals registered on positive edge of system clock
- Internal pipelined operation; column address can be changed every clock cycle
- Internal banks for hiding row access/precharge
- Programmable burst lengths: 1, 2, 4, 8, or full page
- Auto Precharge, includes CONCURRENT auto precharge, and Auto Refresh Modes
- Self Refresh Mode; standard and low power
- 64ms, 4,096-cycle refresh
- Low voltage power supply
- Partial Array Self Refresh power-saving mode
- VDD/VDDQ 3.3V/3.3V 2.5V/2.5V – 1.8V
