Download MT5C128K8A1 Datasheet PDF
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MT5C128K8A1 Description

The MT5C128K8A1 is organized as a 131,072 x 8 SRAM using a four-transistor memory cell with a high-speed, lowpower CMOS process. Micron SRAMs are fabricated using double-layer metal, double-layer polysilicon technology. This device offers multiple center power and ground pins for improved performance.

MT5C128K8A1 Key Features

  • High speed: 12, 15, 20 and 25ns
  • Multiple center power and ground pins for greater noise immunity
  • Easy memory expansion with ?C/E and ?O/E options
  • Automatic ?C/E power down
  • All inputs and outputs are TTL-patible
  • High-performance, low-power, CMOS double-metal process
  • Single +5V ± 10% power supply
  • Fast ?O/E access times: 6, 8, 10 and 12ns
  • Timing 12ns access 15ns access 20ns access 25ns access
  • 2V data retention (optional)