EDB1316BD Datasheet | Micron Technology

Features Embedded LPDDR2 SDRAM EDB1316BD, EDB1332BD, EDB2432B4, EDB4064B4 Features - Ultra low-voltage core and I/O power supplies - VDD2 = 1.14- 1.30V - VDDCA/VDDQ = 1.14- 1.30V - VDD1 = 1.70- 1.95V - Clock frequency range - 533- 10 MHz (data rate range: 1066- 20 Mb/s/pin) - Four-bit prefetch DDR architecture - Eight internal banks for concurrent operation - Multiplexed, double data rate, mand/address inputs; mands entered on every CK edge - Bidirectional/differential data strobe per byte of data (DQS/DQS#) - Programmable READ and WRITE latencies (RL/WL) - Programmable burst lengths: 4, 8, or 16 - Per-bank refresh for concurrent operation - Partial-array self refresh (PASR) - Deep power-down mode (DPD) - Selectable output drive strength (DS) - Clock stop capability - Ro HS-pliant, “green” packaging Table 1: Key Timing Parameters Speed Grade 1D Clock Rate Data Rate (MHz) (Mb/s/pin) RL...