EDB1332BD Description
Embedded LPDDR2.
EDB1332BD Key Features
- Ultra low-voltage core and I/O power supplies
- VDD2 = 1.14-1.30V
- VDDCA/VDDQ = 1.14-1.30V
- VDD1 = 1.70-1.95V
- Clock frequency range
- 533-10 MHz (data rate range: 1066-20 Mb/s/pin)
- Four-bit prefetch DDR architecture
- Eight internal banks for concurrent operation
- Multiplexed, double data rate, mand/address
- Programmable READ and WRITE latencies (RL/WL)