EDW2032BBBG - GDDR5 SGRAM

Description

2Gb: x16, x32 GDDR5 SGRAM Ball Assignments and Descriptions Figure 2: 170-Ball FBGA MF = 0 (Top View) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 A VSSQ DQ1 VSSQ DQ0 NC B VDDQ DQ3 VDDQ DQ2 VSS C VSSQ EDC0 VSSQ VSSQ VDD D VDDQ DBI0_n VDDQ WCK01_t WCK01_c E VSSQ DQ5 VSSQ DQ4

Features

GDDR5 SGRAM EDW2032BBBG.
4 Meg x 32 I/O x 16 banks, 8 Meg x 16 I/O x 16 banks Features.
VDD = VDDQ = 1.6V/1.5V ±3% and 1.35V ±3%.
Data rate: 5.0 Gb/s, 6.0 Gb/s, 7.0 Gb/s (MAX).
16 internal banks.
Four bank groups for tCCDL = 3 tCK.
8n-bit prefetch architecture: 256-bit per array read or write access for x32; 128-bit for x16.
Burst length (BL): 8 only.
Programmable CAS latency: 6.
22.
Programmable WRITE laten.

Micron

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Datasheet Details

Part number	EDW2032BBBG
Manufacturer	Micron
File Size	237.27 KB
Description	GDDR5 SGRAM
Datasheet	EDW2032BBBG Datasheet
Additional preview pages of the EDW2032BBBG datasheet.

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Full PDF Text Transcription

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2Gb: x16, x32 GDDR5 SGRAM Features GDDR5 SGRAM EDW2032BBBG – 4 Meg x 32 I/O x 16 banks, 8 Meg x 16 I/O x 16 banks Features • VDD = VDDQ = 1.6V/1.5V ±3% and 1.35V ±3% • Data rate: 5.0 Gb/s, 6.0 Gb/s, 7.

Published: Aug 13, 2015 |