Micross Components AS5SS512K36D
The AS5SS512K36D is is a 3.3V, 512K x 36 Synchronous flow through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations with no wait state insertion. The AS5SS512K36D is equipped with the advanced No Bus Latency logic required to enable consecutive Read/Write operations with data being transferred on every clock cycle. This feature dramatically improves the throughput of data through the SRAM, especially in systems that require frequent Write-Read transitions.| Part No. | AS5SS512K36D |
|---|---|
| Datasheet | AS5SS512K36D Download |
| Manufacturer |  Micross Components |
| Description | 512K x 36 SSRAM |
| Buy | Stock & Price |
FEATURES
● Pin compatible and functionally equivalent to ZBT devices.● Supports 133MHz bus operations with zero wait states -Data is transferred on every clock
● Internally self-timed output buffer control to eliminate the need to use asynchronous OE\
● Registered inputs for Flow-Through operation
● Byte Write capability
● Common I/O architecture
● Fast clock-to-output times -6.5ns (for 133 MHz device)* -8.5ns (for 100 MHz device)
● Single 3.3V -5% and +1-% power supply VDD
● Separate VDD for 3.3V or 2.5V I/O
● Clock Enable (CEN\) pin to suspend operation
● Synchronous self-timed writes
● Available in 100-pin TSOP package.**
● Burst Capability - linear or interleaved burst order
● No bus latency architecture eliminated dead cycles between write and read cyccles BYTE C BYTE D DQPC DQC DQC VDDQ VSS DQC DQC DQC DQC VSS VDDQ DQC DQC NC VDD NC VSS DQD DQD VDDQ VSS DQD DQD DQD DQD VSS VDDQ DQD DQD DQPD 83 AVAILABLE AS MILITARY SPECIFICATIONS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 2...
