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AS5SS512K36D - 512K x 36 SSRAM

Download the AS5SS512K36D datasheet PDF. This datasheet also covers the AS5SS512K36 variant, as both devices belong to the same 512k x 36 ssram family and are provided as variant models within a single manufacturer datasheet.

General Description

The AS5SS512K36D is is a 3.3V, 512K x 36 Synchronous flow through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations with no wait state insertion.

Key Features

  • Pin compatible and functionally equivalent to ZBT devices.
  • Supports 133MHz bus operations with zero wait states -Data is transferred on every clock.
  • Internally self-timed output buffer control to eliminate the need to use asynchronous OE.
  • Registered inputs for Flow-Through operation.
  • Byte Write capability.
  • Common I/O architecture.
  • Fast clock-to-output times -6.5ns (for 133 MHz device).
  • -8.5ns (for 100 MHz device).
  • Sing.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (AS5SS512K36-MicrossComponents.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
AS5SS128K36 128K x 36 SSRAM SYNCHRONOUS ZBL SRAM FLOW-THRU OUTPUT Austin Semiconductor
AS5SS256K18 256K x 18 SSRAM Micross
AS5SS256K18 256K x 18 SSRAM Synchronous Burst SRAM Austin Semiconductor
AS5SS256K36 256K x 36 SSRAM Micross
AS5SS256K36 256K x 36 SSRAM Flow-Through Synchronous Burst SRAM Austin Semiconductor

Other Datasheets by Micross

Part Number Description
AS5SS512K36D 512K x 36 SSRAM
AS5SS512K36 512K x 36 SSRAM
AS5SP128K32 Synchronous SRAM
AS5SP256K36 Synchronous SRAM
AS5181 DAC

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
SSRAM AS5SS512K36 512K x 36 SSRAM Flow-Through SRAM No Bus Latency 100 99 PIN ASSIGNMENT (Top View) 100-Pin TQFP (DQ) BWD BWC BWB BWA CE1 CE2 CE3 VDD VSS CEN CLK WE OE ADV/LD A 82 A A A A A 81 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 •MIL-STD-883 FEATURES • Pin compatible and functionally equivalent to ZBT devices. • Supports 133MHz bus operations with zero wait states -Data is transferred on every clock • Internally self-timed output buffer control to eliminate the need to use asynchronous OE • Registered inputs for Flow-Through operation • Byte Write capability • Common I/O architecture • Fast clock-to-output times -6.5ns (for 133 MHz device)* -8.5ns (for 100 MHz device) • Single 3.3V -5% and +1-% power supply VDD • Separate VDD for 3.3V or 2.