AS5SP128K36 Overview
Plastic Encapsulated Microcircuit 4.5Mb, 128K x 36, Synchronous SRAM Pipeline Burst, Single Cycle Deselect.
AS5SP128K36 Key Features
- Synchronous Operation in relation to the input Clock
- 2 Stage Registers resulting in Pipeline operation
- On chip address counter (base +3) for Burst operations
- Self-Timed Write Cycles
- On-Chip Address and Control Registers
- Byte Write support
- Global Write support
- On-Chip low power mode [powerdown] via ZZ pin
- Interleaved or Linear Burst support via Mode pin
- Three Chip Enables for ease of depth expansion without
