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SMJ44400 - 1M x 4 DRAM

Key Features

  • Organized 1,048,576 x 4.
  • Single +5V ±10% power supply.
  • Enhanced Page-Mode operation for faster memory access 3 Higher data bandwidth than conventional page-mode parts 3 Random Single-Bit Access within a row with a column address.
  • CAS-Before-RAS (CBR) Refresh.
  • Long Refresh period: 1024-cycle Refresh in 16ms (Max).
  • 3-State unlatched Output.
  • Low Power Dissipation.
  • All Inputs/Outputs and Clocks are TTL Compatible.
  • Proc.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DRAM SMJ44400 1M x 4 DRAM DYNAMIC RANDOM-ACCESS MEMORY AVAILABLE AS MILITARY SPECIFICATIONS • SMD 5962-90847 • MIL-STD-883 FEATURES • Organized 1,048,576 x 4 • Single +5V ±10% power supply • Enhanced Page-Mode operation for faster memory access 3 Higher data bandwidth than conventional page-mode parts 3 Random Single-Bit Access within a row with a column address • CAS-Before-RAS (CBR) Refresh • Long Refresh period: 1024-cycle Refresh in 16ms (Max) • 3-State unlatched Output • Low Power Dissipation • All Inputs/Outputs and Clocks are TTL Compatible • Processing to MIL-STD-883, Class B available PIN ASSIGNMENT (Top View) 20-Pin DIP (JD) 20-Pin Flatpack (HR) (400 MIL) DQ1 DQ2 W RAS A9 A0 A1 A2 A3 Vcc 1 2 3 4 5 6 7 8 9 10 20 Vss 19 DQ4 18 DQ3 17 CAS 16 OE 15 A8 14 A7 13 A6 12 A5 11 A4 P