CFK2062-P5 Datasheet | Mimix Broadband

Features t High Gain t +30 d Bm Power Output t Proprietary Power FET Process t >40% Linear Power Added Efficiency t Surface Mount SO-8 Power Package Applications t ISM Band Base Stations and Terminals t RF ID/POS Base Stations t Wireless Local Loop Description The CFK2062-P5 is a high-gain FET intended for driver amplifier applications in high-power systems, and output stage usage in medium power applications at power levels up to +30 d Bm. The device is easily matched and provides excellent 2.3 to 2.5 GHz +30 d Bm Power Ga As FET Package Diagram G GND GND G 1 2 3 4 Back Plane is Source 8 7 6 5 D GND GND D linearity at 1 Watt. Manufactured in Celeritek’s proprietary power FET process, this device is assembled in an industry standard surface mount SO-8 power package that is patible with high volume, automated board assembly techniques. Specifications (TA = 25°C) The following specifications are guaranteed at room temperature in Celeritek test fixture at 2.45 GHz. Parameters Conditions Min Typ Max Units SO-8 Power Package Physical Dimensions Vd = 8V, Id = 400 m A (Quiescent) P-1d B SSG 3rd Order Products (1) Efficiency @ P1d B Vd = 5V, Id = 600 m A (Quiescent) P-1d B SSG Parameters Conditions 30.0 31.0 12.0 13.0 - - - - Min - - - - - - Max d Bm d B d Bc % d Bm d B Units 30 40 30.5 12.0 Typ gm Idss Vp BVGD ΘJL (2) Vds = 2.0V, Vgs = 0V Vds = 2.0V, Vgs = 0V Vds = 3.0V, Ids = 25 m A Igd = 2.5 m A @150°C TCH - - - 15 - 650 1.4 -1.8 17 12 - - - - m S A Volts Volts °C/W Absolute Maximum Ratings Parameter Symbol Rating Drain-Source Voltage Gate-Source Voltage Drain Current Continuous Dissipation Channel Temperature Storage Temperature VDS VGS IDS PT TCH TSTG 10V (3) -5V Idss 6W 175°C -65°C to +175°C Notes: 1. Sum to two tones with 1 MHz spacing = 25 d Bm. 2. See thermal considerations information on page 4. 3. Maximum potential difference across the device (Vd + Vg) cannot exceed 12V. 3236 Scott Boulevard Santa Clara, California 95054 Phone: (408) 986-5060 Fax: (408)...