MT8952B Overview
The MT8952B HDLC Protocol Controller frames and formats data packets according to X.25 (Level 2) Remendations from the CCITT. 1 Name TxCEN Description Transmit Clock Enable - This active LOW input enables the transmit section in the External Timing Mode. When LOW, CDSTo is enabled and when HIGH, CDSTo is in high impedance state.
MT8952B Key Features
- Formats data as per X.25 (CCITT) level-2 standards Go-Ahead sequence generation and detection Single byte address recogn