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MT8952B - HDLC Protocol Controller

General Description

The MT8952B HDLC Protocol Controller frames and formats data packets according to X.25 (Level 2) Recommendations from the CCITT.

Key Features

  • Formats data as per X.25 (CCITT) level-2 standards.
  • Go-Ahead sequence generation and detection.
  • Single byte address recognition.
  • Microprocessor port and directly accessible registers for flexible operation and control.
  • 19 byte FIFO in both send and receive paths.
  • Handshake signals for multiplexing data links.
  • High speed serially clocked output (2.5 Mbps).
  • ST-BUS compatibility with programmable channel selection for data and.

📥 Download Datasheet

Datasheet Details

Part number MT8952B
Manufacturer Zarlink Semiconductor
File Size 420.69 KB
Description HDLC Protocol Controller
Datasheet download datasheet MT8952B Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ISO-CMOS ST-BUSTM Family MT8952B HDLC Protocol Controller Data Sheet Features • Formats data as per X.25 (CCITT) level-2 standards • Go-Ahead sequence generation and detection • Single byte address recognition • Microprocessor port and directly accessible registers for flexible operation and control • 19 byte FIFO in both send and receive paths • Handshake signals for multiplexing data links • High speed serially clocked output (2.