Datasheet4U Logo Datasheet4U.com

MT9074 - T1/E1/J1 Single Chip Transceiver

Description

The MT9074 is a single chip device, operable in either T1 or E1 mode, integrating either an advanced T1 (T1 mode) or PCM 30 (E1 mode) framer with a Line Interface Unit (LIU).

Features

  • Combined E1 (PCM 30) and T1 (D4/ESF) framer, Line Interface Unit (LIU) and link controller with optional digital framer only mode In T1 mode the LIU can recover signals attenuated by up to 36 dB (6000 ft. of 24 AWG cable) In E1 mode the LIU can recover signals attenuated by up to 36 dB (2000 m. of 0.65mm cable) Two HDLCs: FDL and channel 24 in T1 mode, timeslot 0 (Sa bits) and timeslot 16 in E1 mode Two-frame elastic buffer in Rx & Tx (T1) directions Programmable transmit delay through.

📥 Download Datasheet

Datasheet preview – MT9074

Datasheet Details

Part number MT9074
Manufacturer Mitel Networks Corporation
File Size 372.75 KB
Description T1/E1/J1 Single Chip Transceiver
Datasheet download datasheet MT9074 Datasheet
Additional preview pages of the MT9074 datasheet.
Other Datasheets by Mitel Networks Corporation

Full PDF Text Transcription

Click to expand full text
MT9074 T1/E1/J1 Single Chip Transceiver Advance Information Features • Combined E1 (PCM 30) and T1 (D4/ESF) framer, Line Interface Unit (LIU) and link controller with optional digital framer only mode In T1 mode the LIU can recover signals attenuated by up to 36 dB (6000 ft. of 24 AWG cable) In E1 mode the LIU can recover signals attenuated by up to 36 dB (2000 m. of 0.65mm cable) Two HDLCs: FDL and channel 24 in T1 mode, timeslot 0 (Sa bits) and timeslot 16 in E1 mode Two-frame elastic buffer in Rx & Tx (T1) directions Programmable transmit delay through transmit slip buffer Low jitter DPLL for clock generation Enhanced alarms, performance monitoring and error insertion functions Intel or Motorola non-multiplexed parallel microprocessor interface ST-BUS 2.
Published: |