M66281FP Datasheet PDF - Mitsubishi 5120 x 8-BIT x 2 LINE MEMORY Specs

M66281FP - 5120 x 8-BIT x 2 LINE MEMORY

Datasheet Summary

Description

The M66281FP is high speed line memory that uses high performance silicon gate CMOS process technology and adopts the FIFO (First In First Out) structure consisting of 5120 words x 8 bits x 2.

Features

Memory configuration 5120 words x 8 bits x 2 (dynamic memory) High speed cycle 25 ns (Min. ) High speed access 18 ns (Max. ) Output hold 3 ns (Min. ) Reading and writing operations can be completely carried out independently and asynchronously. Variable length delay bit Input/output TTL direct connection allowable Output 3 states Q00.
Q07 1 line delay Q10.
Q17 2 line delay.

Datasheet Details

Part number	M66281FP
Manufacturer	Mitsubishi
File Size	125.82 KB
Description	5120 x 8-BIT x 2 LINE MEMORY
Datasheet	M66281FP Datasheet
Additional preview pages of the M66281FP datasheet.

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Full PDF Text Transcription

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MITSUBISHI M66281FP 5120 x 8-BIT x 2 LINE MEMORY DESCRIPTION The M66281FP is high speed line memory that uses high performance silicon gate CMOS process technology and adopts the FIFO (First In First Out) structure consisting of 5120 words x 8 bits x 2. Since memory is available to simultaneously output 1 line delay and 2 line delay data, the M66281FP is optimal for the compensation of data of multiple lines. FEATURES • • • • • • • • • • Memory configuration 5120 words x 8 bits x 2 (dynamic memory) High speed cycle 25 ns (Min.) High speed access 18 ns (Max.) Output hold 3 ns (Min.) Reading and writing operations can be completely carried out independently and asynchronously.

Published: Apr 26, 2005 |