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V58C265804S Datasheet High Performance 2.5 Volt 8m X 8 Ddr Sdram 4 Banks X 2mbit X 8

Manufacturer: Mosel Vitelic Corp

Overview: MOSEL VITELIC V58C265804S HIGH PERFORMANCE 2.5 VOLT 8M X 8 DDR SDRAM 4 BANKS X 2Mbit X 8 PRELIMINARY 6 System Frequency (fCK) Clock Cycle Time (tCK3) Clock Cycle Time (tCK2.5) Clock Cycle Time (tCK2) 166 MHz 6 ns 6.5 ns 7ns 7 143 MHz 7 ns 7.

Datasheet Details

Part number V58C265804S
Manufacturer Mosel Vitelic Corp
File Size 457.89 KB
Description HIGH PERFORMANCE 2.5 VOLT 8M X 8 DDR SDRAM 4 BANKS X 2Mbit X 8
Datasheet V58C265804S_MoselVitelicCorp.pdf

General Description

The V58C265804S is a four bank DDR DRAM organized as 4 banks x 2Mbit x 8.

The V58C265804S achieves high speed data transfer rates by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock All of the control, address, circuits are synchronized with the positive edge of an externally supplied clock.

I/O transactions are possible on both edges of DQS.

Key Features

  • s 4 banks x 2Mbit x 8 organization s High speed data transfer rates with system frequency up to 166 MHz s Data Mask for Write Control (DM) s Four Banks controlled by BA0 & BA1 s Programmable CAS Latency: 2, 2.5, 3 s Programmable Wrap Sequence: Sequential or Interleave s Programmable Burst Length: 2, 4, 8 for Sequential Type 2, 4, 8 for Interleave Type s Automatic and Controlled Precharge Command s Suspend Mode and Power Down Mode s Auto Refresh and Self Refresh s Refresh Interval: 4096 cycles/64.

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