Description
Two dedicated General Purpose Quad Timers totaling six pins: Timer C with two pins and Timer D with four pins CAN 2.0 B Module with 2-pin port for transmit and receive Two Serial Communication Interfaces each
Features
- 1.1.1.
- Digital Signal Processing Core
Efficient 16-bit 56800 family hybrid controller engine with dual Harvard architecture As many as 40 Million Instructions Per Second (MIPS) at 80MHz core frequency Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC) Two 36-bit accumulators including extension bits 16-bit bidirectional barrel shifter Parallel instruction set with unique DSP addressing modes Hardware DO and REP loops Three internal ad.
56F807 Datasheet
