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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
9ĆBit Hold Register
The MC10E/100E143 is a 9-bit holding register, designed with byte-parity applications in mind. The E143 holds current data or loads new data, with the nine inputs D0 – D8 accepting parallel input data.
• 700MHz Min. Operating Frequency • 9-Bit for Byte-Parity Applications • Asynchronous Master Reset • Dual Clocks • Extended 100E VEE Range of – 4.2V to – 5.46V • 75kΩ Input Pulldown Resistors
The SEL (Select) input pin is used to switch between the two modes of operation — HOLD and LOAD. Input data is accepted by the registers a set-up time before the positive going edge of CLK1 or CLK2. A HIGH on the Master Reset pin (MR) asynchronously resets all the registers to zero.
MC100E143 Datasheet
