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MC100E175 - 9-BIT LATCH

This page provides the datasheet information for the MC100E175, a member of the MC10E175 9-BIT LATCH family.

Datasheet Summary

Features

  • a tenth latched output, ODDPAR, which is formed as the odd parity of the nine data inputs (ODDPAR is HIGH if an odd number of the inputs are HIGH). The E175 can also be used to generate byte parity by using D8 as the parity-type select (L = even parity, H = odd parity), and using ODDPAR as the byte parity output. The LEN pin latches the data when asserted with a logical high and makes the latch transparent when placed at a logic low level.
  • 9-Bit Latch.
  • Parity Detection/Generat.

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Datasheet preview – MC100E175

Datasheet Details

Part number MC100E175
Manufacturer Motorola
File Size 105.93 KB
Description 9-BIT LATCH
Datasheet download datasheet MC100E175 Datasheet
Additional preview pages of the MC100E175 datasheet.
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Full PDF Text Transcription

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA 9ĆBit Latch With Parity The MC10E/100E175 is a 9-bit latch. It also features a tenth latched output, ODDPAR, which is formed as the odd parity of the nine data inputs (ODDPAR is HIGH if an odd number of the inputs are HIGH). The E175 can also be used to generate byte parity by using D8 as the parity-type select (L = even parity, H = odd parity), and using ODDPAR as the byte parity output. The LEN pin latches the data when asserted with a logical high and makes the latch transparent when placed at a logic low level. • 9-Bit Latch • Parity Detection/Generation • 800ps Max. D to Output • Reset • Extended 100E VEE Range of – 4.2V to – 5.
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