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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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Advance Information
CMI Coder/Decoder
The MC100SX1230 device consists of a Binary to CMI Coder and CMI to Binary Decoder with integrated loop back capability. The device is designed for CMI (Code Mark Inversion) interfaces in transmission applications supporting either 139.26 Mbit/s E4 or 155.52 Mbit/s STM1 line rates.
• Binary-to-CMI Coder and CMI-to-Binary Decoder • Internal Loop Back Test Capability • Supports SDH or PDH Applications • Low Power • Fully Differential 100K Compatible I/O • VBB Reference Available • 75kΩ Input Pulldown Resistors • +5V PECL or –5V ECL Operation • 28-Pin Surface Mount PLCC Package • Asynchronous Reset
In normal operation, the coder and decoder operate independently.
MC100SX1230 Datasheet
