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MC100SX1230 - CMI CODER/DECODER

Features

  • ide, a PLL is required to synthesize the 2X coder clock and a conditioning circuit is needed at the output of the coder to generate the appropriate signal to drive the cable. Device Operation The circuit contains a complete CMI coder and decoder as well as the support circuitry necessary to perform loop back of eithe.

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Datasheet preview – MC100SX1230

Datasheet Details

Part number MC100SX1230
Manufacturer ON Semiconductor
File Size 124.15 KB
Description CMI CODER/DECODER
Datasheet download datasheet MC100SX1230 Datasheet
Additional preview pages of the MC100SX1230 datasheet.

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Full PDF Text Transcription

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document from Logic Marketing Advance Information CMI Coder/Decoder The MC100SX1230 device consists of a Binary to CMI Coder and CMI to Binary Decoder with integrated loop back capability. The device is designed for CMI (Code Mark Inversion) interfaces in transmission applications supporting either 139.26 Mbit/s E4 or 155.52 Mbit/s STM1 line rates.
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