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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
3ĆBit 4:1 MuxĆLatch
The MC10E/100E256 contains three 4:1 multiplexers followed by transparent latches with differential outputs. Separate Select controls are provided for the leading 2:1 mux pairs (see logic symbol).
When the Latch Enable (LEN) is LOW, the latch is transparent, and output data is controlled by the multiplexer select controls. A logic HIGH on LEN latches the outputs. The Master Reset (MR) overrides all other controls to set the Q outputs LOW.
• 950ps Max. D to Output • 850ps Max. LEN to Output • Split Select • Differential Outputs • Extended 100E VEE Range of – 4.2V to – 5.
MC10E256 Datasheet
