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MC10ELT20 - TTL to Differential PECL Translator

Download the MC10ELT20 datasheet PDF. This datasheet also covers the MC100ELT20 variant, as both devices belong to the same ttl to differential pecl translator family and are provided as variant models within a single manufacturer datasheet.

General Description

PIN Q D VCC GND

Key Features

  • The ELT20 is available in both ECL standards: the 10ELT is compatible with positive MECL 10H logic levels while the 100ELT is compatible with positive ECL 100K logic levels.
  • 1.5ns Typical Propagation Delay.
  • Differential PECL Outputs.
  • Small Outline SOIC Package.
  • PNP TTL Inputs for Minimal Loading.
  • Flow Through Pinouts LOGIC.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MC100ELT20-Motorola.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MOTOROLA SEMICONDUCTOR TECHNICAL DATA TTL to Differential PECL Translator The MC10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL (Positive ECL) levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of the ELT20 makes it ideal for those applications where space, performance and low power are at a premium. Because the mature MOSAIC 1.5 process is used, low cost can be added to the list of features. The ELT20 is available in both ECL standards: the 10ELT is compatible with positive MECL 10H logic levels while the 100ELT is compatible with positive ECL 100K logic levels. • 1.