ZH
ns
tPLZ
ns
tPZL
ns
Clock Pulse Frequency
fcl
MHz
Clock or Scanner Clock Pulse Width
tWH
ns
Scanner Reset Pulse Width
tw
ns
Scanner Reset Removal Time
trem
ns
Master Reset Pulse Width
tWH(R)
ns
Master Reset Removal Time
trem
ns.
The formulas given are for the typical characteristics only at 25_ C. #Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. MC14534B 4.
The following content is an automatically extracted verbatim text
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14534B 5 Cascaded BCD Counters
The MC14534B is composed of five BCD ripple counters that have their respective outputs multiplexed using an internal scanner. Outputs of each counter are selected by the scanner and appear on four (BCD) pins. Selection is indicated by a logic high on the appropriate digit select pin. Both BCD and digit select outputs have three–state controls providing an “open–circuit” when these controls are high and allowing multiplexing. Cascading may be accomplished by using the carry–out pin. The counters and scanner can be independently reset by applying a high to the counter master reset (MR) and the scanner reset (SR).
MC14534B Datasheet
