MC1650 Overview
Key Specifications
Package: DIP
Operating Voltage: 5 V
Length: 19.495 mm
Width: 7.62 mm
Key Features
- The clock inputs (Ca and Cb) operate from MECL III or MECL 10,000 digital levels
- When Ca is at a logic high level, Q0 will be at a logic high level provided that V1 V2 (V1 is more positive than V2)
- Q0 is the logic complement of Q0
- When the clock input goes to a low logic level, the outputs are latched in their present state
- TRUTH TABLE C H H L V1 X u V2 V1 t V2 X V1 , V2 Q0n + 1 H L Q0n Q0n + 1 L H Q0n 3/93 © Motorola, Inc