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MC88915FN55PLCC Datasheet

Low Skew CMOS Pll Clock Driver

Manufacturer: Motorola Semiconductor (now NXP Semiconductors)

MC88915FN55PLCC Overview

A lock indicator output (LOCK) will go high when the loop is in steady state phase and frequency lock. The LOCK output will go low if phase lock is lost or when the PLL_EN pin is low. Under certain conditions the lock output may remain low, even though the part is phase locked.

MC88915FN55PLCC Key Features

  • Five Outputs (QO-Q4) with Output-Output Skew < 500 ps each being phase and frequency locked to the SYNC input
  • The phase variation from part-to-part between the SYNC

MC88915FN55PLCC Applications

  • Five Outputs (QO-Q4) with Output-Output Skew < 500 ps each being phase and frequency locked to the SYNC input
  • The phase variation from part-to-part between the SYNC

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