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MC92053 - Quad FTTC Network Framer

Datasheet Summary

Description

The MC92053 implements four copies of the TC sublayer of the DAVIC asymmetrical FTTC PHY specification for network devices.

The MC92053 key functional blocks are described in the paragraphs which follow.

Features

  • Implements the DAVIC short-range baseband asymmetrical physical layer standard Interfaces to an ATM-layer device using a multi-PHY UTOPIA Level 2 compliant interface Provides an 8-bit system interface as a generic slave device IEEE 1149.1 (JTAG) boundary scan test port 3.3 V operation with TTL compatibility on I/O pins Extended temperature operation: -40 to 85 °C Available in 208 Pin Plastic Quad Flat Package Each of the four.

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Datasheet preview – MC92053

Datasheet Details

Part number MC92053
Manufacturer Motorola
File Size 45.22 KB
Description Quad FTTC Network Framer
Datasheet download datasheet MC92053 Datasheet
Additional preview pages of the MC92053 datasheet.

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Full PDF Text Transcription

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this Data Sheet by MC92053/D Product Brief MC92053 Quad FTTC Network Framer MC92053 The MC92053 is a peripheral device composed of four parallel bidirectional TC-sublayer functional units with UTOPIA Level 2 compliant ATM-layer ports. MC92053 Features • • • • • • • Implements the DAVIC short-range baseband asymmetrical physical layer standard Interfaces to an ATM-layer device using a multi-PHY UTOPIA Level 2 compliant interface Provides an 8-bit system interface as a generic slave device IEEE 1149.1 (JTAG) boundary scan test port 3.
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