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MCM64PC32 - 256K/512K Pipelined BurstRAM Secondary Cache Module for Pentium

Datasheet Summary

Description

160 Lead Card Edge Pin Locations 20, 21, 22, 23, 24, 26, 28, 29, 101, 102, 103, 104, 106, 108, 109, 110 36, 116 11, 12, 13, 14, 92, 93, 94, 96 8 18 17 16 31, 32 30 Symbol A3 A18 CLK0, CLK1 CWE0 CWE7 TWE BWE GWE CCS ECS1, ECS2 ADSP Type Input Input Input Input Input Input

Features

  • lished. This device contains circuitry that will ensure the output devices are in High.
  • Z at power up. Tstg.
  • 55 to + 125 °C NOTE: Permanent device damage may occur if.

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Datasheet Details

Part number MCM64PC32
Manufacturer Motorola
File Size 180.65 KB
Description 256K/512K Pipelined BurstRAM Secondary Cache Module for Pentium
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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM64PC32/D Advance Information 256K/512K Pipelined BurstRAM™ Secondary Cache Module for Pentium™ The MCM64PC32 (256K) and MCM64PC64 (512K) are designed to provide a burstable, high performance, L2 cache for the Pentium microprocessor in conjunction with Intel’s Triton II chip set. The MCM64PC32 is configured as 32K x 64 bits and the MCM64PC64 is configured as 64K x 64 bits. Both are packaged in a 160 pin card edge memory module. Each module uses Motorola’s 3.3 V 32K x 32 BurstRAMs and one Motorola 3.3 V 32K x 8 FSRAM for the tag RAM. Bursts can be initiated with either address status processor (ADSP) or cache address status (CADS).
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