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MCM69C232 - 4K x 64 CAM

General Description

Pin Locations 42 44 58 17 20, 23 26, 29 32, 35 38 61 57 39 89 92 64 62 67 70, 73 76, 79 82, 85 88, 93 96, 99, 100, 1, 2, 5 8, 11 14 56 46 52 50 55 51 49 63 45 4, 10, 16, 22, 27, 3

Key Features

  • igh G Low to MQ Active G High to MQ High.
  • Z LH/SM Low to LH/SM Low tKHKH tKHKL tKLKH tKHLL tKHLH tMQVKH tKHMQX tKHMQV tKHMCH tKHMCL tKHMSL tKHMSH tKHVPL tKHVPH tGLMQX tGHMQZ tSMSM 20 8 8.
  • 8 2.
  • 3.8.
  • 10 250 242 242 7 7.
  • 12 5 5 12 5 12 5.
  • 4.
  • ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns cycles Symbol Min Max Unit RL = 50 Ω OUTPUT Z0 = 50 Ω VL = 1.5 V Figur.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM69C232/D Advance Information MCM69C232 4K x 64 CAM The MCM69C232 is a flexible content–addressable memory (CAM) that can contain 4096 entries of 64 bits each. The widths of the match field and the output field are programmable, and the match time is designed to be 160 ns. As a result, the MCM69C232 is well suited for datacom applications such as Virtual Path Identifier/Virtual Circuit Identifier (VPI/VCI) translation in ATM switches up to OC12 (622 Mbps) data rates and Media Access Control (MAC) address lookup in Ethernet/Fast Ethernet bridges. The match duty cycle of the MCM69C232 is user defined, with a trade–off between the time between matches and the number of new entries added to the CAM per second.