MCM6929A Datasheet | Motorola Semiconductor

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM6929A/D Advance Information 256K x 4 Bit Fast Static Random Access Memory The MCM6929A is a 1,048,576 bit static random access memory organized as 262,144 words of 4 bits. Static design eliminates the need for external clocks or timing strobes. Output enable (G) is a special control feature that provides increased system flexibility and eliminates bus contention problems. This device meets JEDEC standards for functionality and revolutionary pinout, and is available in a 400 mil plastic small- outline J- leaded package. - - - - - - - Single 3.3 V Power Supply Fully Static - No Clock or Timing Strobes Necessary All Inputs and Outputs Are TTL patible Three State Outputs Fast Access Times: 8, 10, 12, 15 ns Center Power and I/O Pins for Reduced Noise Fully 3.3 V Bi CMOS WJ PACKAGE 400 MIL SOJ CASE 857A- 02 PIN ASSIGNMENT NC A A A A E DQ VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 A A A A A G DQ VSS VDD DQ A A A A A NC BLOCK DIAGRAM A A A A A A A A A DQ INPUT DATA CONTROL DQ A A COLUMN I/O COLUMN DECODER ROW DECODER MEMORY MATRIX 512 ROWS x 512 x 4 COLUMNS VDD VSS VSS DQ W A A A A NC PIN NAMES - - - - . Address Input E - - - - . . Chip Enable W - - - - Write Enable G - - - . . . . Output Enable DQ - - - Data Input/Output VDD - - . + 3.3 V Power Supply VSS -...