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MCM6946 - 512K x 9 Bit Fast Static Random Access Memory

Key Features

  • d W low. 2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus contention conditions during read and write cycles. 3. If G goes low coincident with or after W goes low, the output will remain in a high.
  • impedance state. 4. All write cycle timings are referenced from the last valid address to the first transitioning address. 5. Transition is measured ± 200 mV from steady.
  • state voltage. 6. This param.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM6946/D Advance Information MCM6946 512K x 8 Bit Static Random Access Memory The MCM6946 is a 4,194,304–bit static random access memory organized as 524,288 words of 8 bits. Static design eliminates the need for external clocks or timing strobes. The MCM6946 is equipped with chip enable (E) and output enable (G) pins, allowing for greater system flexibility and eliminating bus contention problems. Either input, when high, will force the outputs into high–impedance. The MCM6946 is available in a 400 mil, 36–lead surface–mount SOJ package. • • • • • • • Single 3.